Search - frequency divider

[Other resource] FPGAprogram2

Description: 半整数分频器电路的VHDL源程序，供大家学习和讨论。 -half-integer frequency divider circuit VHDL source code for all learning and discussion.
Platform: | Size: 3379 | Author: 许嘉 | Hits:

Description: 多数位分频器.............................................可直接编译-Contents Paragraphs Page majority-Frequency Divider can be directly translated .......................
Platform: | Size: 12184 | Author: 学习 | Hits:

[Other resource] compDIVIDER

Description: 基于VHDL语言描述的一个分频器，根据端口值，可作为四分频，八分频等分频器使用。-based on VHDL description of a divider, according to port value, as a quarter of frequency, Frequency Divider interval such use.
Platform: | Size: 1396 | Author: djksdf | Hits:

[Other] EWB

Description: EWB做的多功能数字钟由振荡器输出稳定的高频脉冲信号作为时间基准，经分频器输出标准的秒脉冲，秒计数器满60向分计数器进位，分计数器满60向小时计数器进位，小时计数器按“12翻1”规律计数，计数器经译码器送到显示器；计数出现误差可用校时电路进行校时、校分、校秒，可发挥部分：使闹钟具有可整点报时与定时闹钟的功能。 -EWB done by the multi-function digital clock oscillator output stable high frequency pulse signal as a time reference. Frequency Divider output by the standards of seconds pulse, aged 60 seconds to counter-counter rounding, Counter-to-60-hour counter rounding, by the Counter-hour "12 over a" law count, Counter by the decoder to display; Counting errors school circuit can be used for schools, school hours, school seconds to play : The alarm clock can be made with whole point regular alarm clock and timer functions.
Platform: | Size: 128811 | Author: zero | Hits:

[Other resource] feizhenshu

Description: 非整数分频器分频系数为无限不循环小数 vhdl-non-integer frequency divider coefficient of circulator is not unlimited vhdl
Platform: | Size: 1828 | Author: 那锋 | Hits:

[Other resource] Verilog_FPGA_fp

Description: 用Verilog实现基于FPGA的通用分频器-using Verilog FPGA-based Universal Frequency Divider
Platform: | Size: 125483 | Author: xiong | Hits:

[VHDL-FPGA-Verilog] frequency

Description: 在CPLD和FPGA上采用VHDL语言进行分频器设计，供设计者参考-digital frequency divider design with VHDL
Platform: | Size: 322560 | Author: zhangct | Hits:

[Com Port] 9600divider

Description: 任意分频器,可以实现FPGA的CLK分频功能，已通过编译-Arbitrary frequency divider can be achieved FPGA-CLK sub-band capabilities, has passed the compilation
Platform: | Size: 195584 | Author: liujieyu | Hits:

[VHDL-FPGA-Verilog] FPGA-based-multi-Divider

Description: 分频器是指使输出信号频率为输入信号频率1/N的电子电路,N是分频系数。在许多电子设备中如电子钟、频率合成器等，需要各种不同频率的信号协同工作，常用的方法是以稳定度高的晶体振荡器为主振源，通过变换得到所需要的各种频率成分，分频器是一种主要变换手段。本文当中，在分析研究和总结了分频技术的发展趋势的基础上，以实用、可靠、经济等设计原则为目标，介绍了基于FPGA的多种分频器的设计思路和实现方法。本设计采用EDA技术，以硬件描述语言VHDL为系统逻辑描述手段设计文件，在QuartusⅡ工具软件环境下，采用自顶向下的设计方法，由各个基本模块共同构建了一个基于FPGA的分频器。本次设计实现了包括整数、半整数和小数这三种不同类型分频器的分频，在设计过程中，系统主芯片采用EP1C6Q240C8，各个模块在QuartusⅡ上进行编程调试和仿真通过后，在GW48-SOPC上进行了下载。通过对各个部分测试后表明均能正确分频，完成了对系统的软件和硬件的设计，达到了系统的设计要求。 -Frequency divider refers to the frequency of the output signal as the input signal 1/N of electronic circuits. N is the frequency coefficient. In many electronic equipments such as the electronic clock, frequency synthesizers, which need different frequency signals work together and common way is to use the stability of the crystal oscillator as vibration source by converting the frequency components all needed. The frequency divider is a major means of conversion. In this paper, with the analytic study and review of trend basis of the technical frequency, a functional, reliable, economic and other design principles as the goal, this paper introduces a number of points frequency of the design and implementation based on FPGA. This design adopts the technology of EDA and hardware description language VHDL as logical description means of designing files. Under the environment of QuartusⅡ tools and the top-to-down approach, they build jointly a frequency divider by the basic modules base
Platform: | Size: 5120 | Author: 吴红梅 | Hits:

[VHDL-FPGA-Verilog] Digital-frequency-meter

Description: 这是应用VHDL语言在FPGA实现对频率进行分频的整个工程-This is the application of VHDL language in the FPGA implementation of the frequency divider of the whole project
Platform: | Size: 2810880 | Author: James | Hits:

[Other] frequency-divider-graphic-design

Description: 数字系统EDA 多级分频器图形设计熟悉和掌握MAX+PlusⅡ的编译、仿真操作。-The multi-level divider graphic design of digital systems EDA familiar with and master MAX+Plus Ⅱ compilation, simulation operation.
Platform: | Size: 256000 | Author: 王海阔 | Hits:

[Other] FPGAfrequency-divider

Description: 一种基于FPGA的分频器实现，讲的很详细，很实用，希望能帮助您。-A kind of the frequency divider based on FPGA realization, speak very detailed, very practical, the hope can help you.
Platform: | Size: 61440 | Author: 陈吧 | Hits:

[VHDL-FPGA-Verilog] frequency-divider

Description: 基于Quartus2和Modlesim环境下编译顺利通过的分频器源程序代码-Source code compiled Quartus2, and Modlesim environment passed the divider
Platform: | Size: 1024 | Author: 曾红雨 | Hits:

[VHDL-FPGA-Verilog] divider

Description: 用VHDL编写的多次分频器，带有VHDL测试平台代码-Multiple frequency divider with VHDL testbench code
Platform: | Size: 1024 | Author: 叶宗英 | Hits:

[VHDL-FPGA-Verilog] frequency-divider

Description: 用VERILOG 语言写的数控分频器，可能输入时钟信号实现任意整数倍的分频，-NC divider, with the words written in VERILOG HDL, can achieve any integer multiple of the input clock frequency, contains the entire project file.
Platform: | Size: 491520 | Author: zyb | Hits:

[VHDL-FPGA-Verilog] Divider

Description: VHDL代码实现分频器设计分频器系统时钟20万分频上升沿触发-VHDL code Divider Design The system clock frequency divider 20 extremely Rising edge triggered
Platform: | Size: 2048 | Author: 123456789 | Hits:

[VHDL-FPGA-Verilog] frequency-demultiplier

Description: 电子分频器：有源电路，位于功率放大器之前，将前置音频信号分频后再用各自独立的功率放大器，把每一个音频频段信号给予放大，然后分别送到相应的扬声器单元-Electronic frequency divider: active circuits, in front of the power amplifier, will lead audio signal frequency and then separate the power amplifier, the every audio frequency signals given amplification, and then were sent to the corresponding speaker unit
Platform: | Size: 10240 | Author: 王丽 | Hits:

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[Other resource] FPGAprogram2

[Embeded-SCM Develop] Hkbus16

[Other resource] compDIVIDER

[Other] EWB

[Other resource] feizhenshu

[Other resource] Verilog_FPGA_fp

[VHDL-FPGA-Verilog] frequency

[Com Port] 9600divider

[VHDL-FPGA-Verilog] FPGA-based-multi-Divider

[VHDL-FPGA-Verilog] Digital-frequency-meter

[Other] frequency-divider-graphic-design

[Other] FPGAfrequency-divider

[VHDL-FPGA-Verilog] frequency-divider

[VHDL-FPGA-Verilog] divider

[VHDL-FPGA-Verilog] frequency-divider

[VHDL-FPGA-Verilog] Divider

[VHDL-FPGA-Verilog] frequency-demultiplier

[VHDL-FPGA-Verilog] divider

[VHDL-FPGA-Verilog] frequency-generation

[OS program] Divider

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